Academic Background

Chenrui Hu is a dedicated software engineer and a master’s student at the University of Pennsylvania, pursuing a Master of Science in Computer Information Science with a GPA of 3.9+. He holds a Bachelor of Science in Computer Engineering from the University of Glasgow, where he graduated with a GPA of 3.73.

Working Experience

Chenrui’s professional journey includes impactful internships at top-tier companies like AliPay and Tencent WeChat. At AliPay, he integrated complex identity verification and profit calculation features into Lazada’s e-commerce app, significantly improving system efficiency by handling over 600+ requests per second and boosting key transaction success rates by 60%. During his time at Tencent WeChat, Chenrui played a pivotal role in establishing a new billing platform, reducing query response times from 100ms to 30ms, and successfully implementing traffic migration across multiple countries through a sophisticated canary release mechanism.

Additionally, his tenure at ZTE saw him optimize memory management and class loading processes, reducing the class file growth rate by 80% and significantly minimizing the probe size. Chenrui is proficient in Java, Python, JavaScript, C++, and SQL, and adept with technologies like Spring Boot, React, AWS, and RocketMQ. He has also developed complex cloud-based applications, leveraging Google Cloud Platform services and ensuring high-performance scalability.

Technical Stack

Languages: Java, C/C++, JavaScript, Python, Golang, SQL, Shell, HTML/CSS

Frameworks and Test Libraries: Spring Boot, Node.js, Express.js, React.js, Flask, Material-UI, TailWind CSS, JUnit, Jest, Mockito, Supertest, Cypress

Database and Storage: MySQL, MongoDB, Redis, AWS (EC2, RDS, S3), Google Cloud Storage (GCS), ElasticSearch

Tools and Cloud Platforms: Git, Docker, Github Action, GitLab CI, Netdata Monitor, AWS EC2, Google Cloud Platform (GCP)

Technologies and Protocols: RESTful APIs, OAuth2.0, JWT, TCP/IP, UDP, Multiplex I/O, Event-driven architecture, Multi-thread architecture